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  seiko epson corporation 1 pf1004-01 E0C62M2 4-bit single chip microcomputer low voltage operation products l core cpu architecture l dual slope type a/d converter l high quality display lcd driver l svd circuit n description the E0C62M2 is a cmos 4-bit single-chip microcomputer made up of the 4-bit core cpu e0c6200a, rom, ram, dual slope type a/d converter, attenuator circuit for various measurement modes, lcd driver, serial interface, and other circuits. it is especially suitable for measurement and lcd display systems such as a digital multimeter. n features l cmos lsi 4-bit parallel processing l clock ..................................................... 32.768khz (typ.) l instruction set ........................................ 100 instructions l instruction execution time ..................... 153sec, 214sec, 366sec l rom capacity ....................................... 1,536 words 12 bits l ram capacity ........................................ 128 words 4 bits l a/d converter ........................................ dual slope type resolution : conversion time (2 stages) 4,370 counts : 400 msec a/d conversion precision: 0.1% (operating temperature range: 20c to 40c) 441 counts : 100 msec (high speed mode) 3 integral resistors can be connected current, voltage and resistance can be measured ac voltage/ac current can be measured using an external rectifier circuit continuity check mode built-in (measurement value can be displayed) reference voltage generation circuit built-in l input port ............................................... 8 bits (pull down resistors can be supplemented by mask option) l output port ............................................ 4 bits l buzzer output ........................................ 2 ports (bz, bz) l i/o port .................................................. 4 bits l serial interface ...................................... 1 port for data input 1 port for data output 1 port for clock input/output l lcd driver ............................................. 16 segments 3 or 4 commons (can be switched using software) lcd drive voltage generation circuit built-in (v l1 , v l2 , v l3 ) compatible with 3v lcd panel l timer ..................................................... built-in l watchdog timer ..................................... built-in l supply voltage detection (svd) circuit .. 2.3 0.15v l interrupt ................................................. external : input port interrupt 2 systems internal : a/d interrupt 1 system timer interrupt 1 system serial interface interrupt 1 system l supply voltage ...................................... 3.0v (2.15v to 3.5v) l current consumption (typ.) .................. halt mode (32.768khz/3.0v) : 3a (typ.) a/d operating (32.768khz/3.0v) : 0.9ma (in dc measurement) a/d operating (32.768khz/3.0v) : 1.1ma (in ac measurement) l package ................................................ qfp5-80pin (plastic/ceramic), qfp14-80pin (plastic) or chip these ports can be switched to general i/o port
2 E0C62M2 n block diagram 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 seg15 com0 com1 com2 com3 v l1 v l2 v l3 v dd osc1 osc2 reset test v ssd c1 c2 v ss2 v dda v ssa v adj no. pin name 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 v rf1 v rf2 ch cl adi ado avx1 avx2 co caz ci buf1 buf2 buf3 iil iih cfi sgnd vi ovx no. pin name 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 ovsg r1 r2/vi5 r3/vi4 r4/vi3 r5/vi2 r6 k00 k01 k02 k03 k10 k11 k12 k13 r00 r01 r02 r03 bz no. pin name 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 bz p00/sin p01/sout p02/sclk p03/srdy seg0 seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg11 seg12 seg13 seg14 no. pin name qfp5-80pin n pin configration core cpu e0c6200a E0C62M2 block diagram system reset control rom 1,536 12 interrupt control ram 128 4 timer input port output port and buzzer i/o port serial interface reset test k00~k03 k10~k13 r00~r03 bz bz p00~p03 vi r6 r5/vi2 r4/vi3 r3/vi4 r2/vi5 r1 osc and sleep lcd driver 16 4 logic power control and svd reference voltage control a/d converter op-amp osc1 osc2 com0~ com3 seg0~ seg15 v dd v l1 v l2 v l3 v ssd c1 c2 v ss2 v dda v rf1 v rf2 v adj v ssa ch cl sgnd buf1 buf2 buf3 caz ci adi ado avx1 avx2 co iil iih cfi ovx ovsg analog switch circuit 41 64 25 40 index 24 1 80 65 E0C62M2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 com2 com3 v l1 v l2 v l3 v dd osc1 osc2 reset test v ssd c1 c2 v ss2 v dda v ssa v adj v rf1 v rf2 ch no. pin name 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 cl adi ado avx1 avx2 co caz ci buf1 buf2 buf3 iil iih cfi sgnd vi ovx ovsg r1 r2/vi5 no. pin name 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 r3/vi4 r4/vi3 r5/vi2 r6 k00 k01 k02 k03 k10 k11 k12 k13 r00 r01 r02 r03 bz bz p00/sin p01/sout no. pin name 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 p02/sclk p03/srdy seg0 seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg11 seg12 seg13 seg14 seg15 com0 com1 no. pin name qfp14-80pin 41 60 21 40 index 20 1 80 61 E0C62M2
3 E0C62M2 digital system power supply pin (+) analog system power supply pin (+) digital system power supply pin (? analog system gnd pin (same voltage with v ssd ) analog system power supply pin (boosted voltage) booster capacitor connecting pins for analog system power supply (v ss2 ) crystal oscillation input pin: 32.768 khz crystal oscillation output pin input pins output pins buzzer signal output pins i/o pins lcd system voltage output pin lcd common output pins (1/3, 1/4 duty, programmable) lcd segment output pin (dc output may be selected by mask option) reference voltage adjustment pin reference voltage output pin reference voltage output pin op-amp inverted input pin for ac-dc conversion op-amp output pin for ac-dc conversion ac-dc converted voltage input pin ac-dc converted voltage input pin input pins for current measurement input pin for voltage measurement reference resistor connecting pin (100 w ) reference resistor connecting pin (1 k w ) reference resistor connecting pin (10 k w ) reference resistor connecting pin (101 k w ) reference resistor connecting pin (1.11 m w ) reference resistor connecting pin (10 m w ) reference resistor voltage input pin for resistance measurement reference resistor voltage input pin for resistance measurement gnd for measurement dummy pad capacitor connecting pin for offset voltage zero adjustment integral capacitor connecting pin buffer amp output, integral resistor connecting pin noise rejection filter connecting pin capacitor connecting pin for reference voltage control capacitor connecting pin for reference voltage control testing input pin initial reset input pin pin name (i) (i) (i) (i) (o) o i o i o o i/o o o o i o i i i/o function 9 18 14 19 17 15, 16 10 11 48?5 56?9 60, 61 62?5 6? 2? 66?0, 1 20 21 22 25 26 27 28 35, 36 39 42 43 44 45 46 47 40 41 38 29 30 31 32?4 37 23 24 13 12 qfp5-80 pin no. 6 15 11 16 14 12, 13 7 8 45?2 53?6 57, 58 59?2 3? 79, 80, 1, 2 63?8 17 18 19 22 23 24 25 32, 33 36 39 40 41 42 43 44 37 38 35 26 27 28 29?1 34 20 21 10 9 qfp14-80 v dd v dda v ssd v ssa v ss2 c1, c2 osc1 osc2 k00?13 r00?03 bz, bz p00?03 v l1 ? l3 com0? seg0?5 v adj v rf1 v rf2 adi ado avx1 avx2 iil, iih vi r1 r2/vi5 r3/vi4 r4/vi3 r5/vi2 r6 ovx ovsg sgnd co caz ci buf1? cfi ch cl test reset n pin description
4 E0C62M2 n electrical characteristics l absolute maximum ratings rating symbol unit value supply voltage input voltage permissible total output current * 1 operating temperature (1) operating temperature (2) * 2 storage temperature soldering temperature / time permissible dissipation * 3 * 1: * 2: * 3: v dd /v dda v ssd /v ssa v ss2 v i1 v i2 s i topr 1 topr 2 tstg tsol p d v v v v v ma c c c mw 0 -3.5 -7.0 (v ssd /v ssa - 0.3) to (v dd /v dda + 0.3) (v ss2 - 0.3) to (v dd /v dda + 0.3) 10 -20 to 70 0 to 40 -65 to 150 260 c, 10sec (lead section) 250 (v dd /v dda =0v) the permissible total output current is the sum total of the current (average current) that simultaneously flows from the outpu t pins (or is drawn in). the a/d converter is on status. in case of plastic package (qfp5-80pin, qfp14-80pin). v ssd system v ss2 system l recommended operating conditions condition symbol unit remark supply voltage oscillation frequency measurement system operating temperature v ssd /v ssa f osc1 tmes v khz c v dd /v dda =0v during measurement by the a/d converter max. -2.15 35 typ. -3.0 32.768 25 min. -3.5 15 l dc characteristics (unless otherwise specified: v dd /v dda =0v, v ssd /v ssa =-3.0v, f osc1 =32.768khz, ta=25 c, v l1 ? l3 are internal voltage) high level input voltage (1) high level input voltage (2) low level input voltage (1) low level input voltage (2) high level input current (1) high level input current (2) low level input current high level output current (1) high level output current (2) low level output current (1) low level output current (2) common output current segment output current (during lcd output) segment output current (during dc output) v ih1 v ih2 v il1 v il2 i ih1 i ih2 i il i oh1 i oh2 i ol1 i ol2 i oh3 i ol3 i oh4 i ol4 i oh5 i ol5 v v v v a a a ma ma ma ma a a a a ma ma v ih1 =v dd , v ssd =-3.0v without pull down resistor v ih2 =v dd , v ssd =-3.0v with pull down resistor v il =v ssd =-3.0v v oh1 =0.1? ssd , v ssd =-3.0v v oh2 =0.1? ssd , v ssd =-3.0v v ol1 =0.9? ssd , v ssd =-3.0v v ol2 =0.9? ssd , v ssd =-3.0v v oh3 =v dd -0.05v v ol3 =v l3 +0.05v v oh4 =v dd -0.05v v ol4 =v l3 +0.05v v oh5 =0.1? ssd v ol5 =0.9? ssd max. v dd v dd 0.9? ssd 0.9? ssd 0.5 20 0 -0.9 -1.2 -3.0 -3.0 50 min. 0.1? ssd 0.1? ssd v ssd v ssd 0 5 -0.5 3.0 3.5 3.0 3.0 -70 k00?03, k10?13 reset, test p00?03 k00?03, k10?13 reset, test p00?03 k00?03, k10?13 p00?03, reset, test k00?03, k10?13 p00?03, reset, test k00?03, k10?13 p00?03, reset, test r00?03, p00?03 bz, bz r00?03, p00?03 bz, bz com0?om3 seg0?eg15 seg0?eg15 typ. 10 characteristic symbol unit condition
5 E0C62M2 l analog circuit characteristics and current consumption lcd drive voltage svd voltage svd circuit response time power current consumption * 1: * 2: v l1 v l2 v l3 v svd t svd i op v v v v s a a ma ma connect 1m w load resistor between v dd and v l1 , c l1 =0.047 f connect 1m w load resistor between v dd and v l2 , c l2 =0.047 f connect 1m w load resistor between v dd and v l3 , c l3 =0.047 f during sleep during halt during a/d operation * 1 during a/d operation * 2 max. -0.95 -2.00 -3.05 -2.15 100 4.0 6.0 2.0 2.2 min. -1.15 -2.20 -3.25 -2.45 (unless otherwise specified: v dd /v dda =0v, v ssd /v ssa =-3.0v, f osc1 =32.768khz, ta=25 c, v l1 ? l3 are internal voltage) typ. -1.05 -2.10 -3.15 -2.30 1.5 3.0 0.9 1.1 v ssd /v ssa =-3.0v v ssd /v ssa =-3.0v v ssd /v ssa =-3.0v v ssd /v ssa =-3.0v dcv and dca measurement mode dcv and acv measurement mode (the general amp is on status.) characteristic symbol unit condition a/d converter sampling time sampling rate linearity error porality error zero point error voltage range * 1: s t1 s t2 s r1 s r2 l in e p z off v ssd /v ssa ms ms /s /s %fs dgt dgt v a/d conversion in normal mode a/d conversion in high speed mode a/d conversion in normal mode a/d conversion in high speed mode a/d conversion in normal mode a/d conversion in normal mode a/d conversion in normal mode v dd =v dda =0v max. 0.2 +2 +2 v svd * 1 min. -0.2 -2 -2 -3.5 (unless otherwise specified: v dd /v dda =0v, v ssd /v ssa =-3.0v, f osc1 =32.768khz, ta=25 c, v l1 ? l3 are internal voltage) typ. 100 10 2.5 10 v svd : svd judgment voltage characteristic symbol unit condition reference voltage generator temperature characteristics supply voltage characteristics reference voltage output output voltage during resistance measurement vref t vref v vref 1 vrmes ppm/deg % mv v v v v v v 0 to 40 c v ssa (v ssd )=-2.15 to -3.5v short-circuit between v rf1 and v adj terminals voltage between v rf1 and v ssa connect 70 k w load resistor between v rf1 and v ssa v rf1 -v ssa =1.0v (output voltages are values in case of v ssa standard) max. 300 0.1 780 min. -300 -0.1 400 (unless otherwise specified: v dd /v dda =0v, v ssd /v ssa =-3.0v, f osc1 =32.768khz, ta=25 c, v l1 ? l3 are internal voltage) typ. 0 v dda 0.7 0.47 0.47 0.47 0.47 characteristic symbol unit condition 400 w range 4k w range 40k w range 400k w range 4m w range 40m w range l oscillation characteristics the oscillation characteristics change depending on the conditions (components used, board pattern, etc.). use the follow- ing characteristics as reference values. characteristic symbol unit condition oscillation start voltage oscillation stop voltage built-in capacitance (gate) built-in capacitance (drain) harmonic oscillation start voltage permitted leak resistance vsta vstp c g c d v hho r leak v v pf pf v m w t sta 3sec t stp 10sec max. -2.15 -1.8 -3.5 min. 200 (unless otherwise specified: v dd /v dda =0v, v ssd /v ssa =-3.0v, crystal: c-002r (c i =35k w ), c g =c d =built-in, f osc1 =32.768khz, ta=25 c) typ. 20 15
E0C62M2 notice: no part of this material may be reproduced or duplicated in any form or by any means without the written permission of seiko ep son. seiko epson reserves the right to make changes to this material without notice. seiko epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is n o representation that this material is applicable to products requiring high level reliability, such as, medical products. moreover, no license to an y intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accord ance with this material will be free from any patent or copyright infringement of a third party. this material or portions thereof may contain technology or the subject relating to strategic products under the control of the foreign exchange and foreign trade control law of japan and may require an export license from the ministry of international trade and industry or other approval from another government agency. ? seiko epson corporation 1999 all right reserved. seiko epson corporation electronic devices marketing division ic marketing & engineering group ed international marketing department i (europe & u.s.a.) 421-8, hino, hino-shi, tokyo 191-8501, japan phone : 042-587-5812 fax : 042-587-5564 ed international marketing department ii (asia) 421-8, hino, hino-shi, tokyo 191-8501, japan phone : 042-587-5814 fax : 042-587-5110 E0C62M2 1 5 10 15 20 60 55 50 45 80 75 65 70 25 30 40 35 seg15 com0 com1 com2 com3 v l1 v l2 v l3 v dd osc1 osc2 reset test v ssd c1 c2 v ss2 v dda v ssa v adj v rf1 v rf2 ch cl p02 p01 p00 bz bz r03 r02 r01 r00 k13 k12 k11 k10 k03 k02 k01 k00 r6 r5/vi2 r4/vi3 r3/vi4 r2/vi5 r1 ovsg adi ado avx1 avx2 co caz ci buf1 buf2 buf3 iil iih cfi sgnd vi ovx seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 seg0 p03 index lcd panel x'tal c l1 c l2 c l3 c sr c b2 c b1 3.6v c pwr dcv acv c 1 c r r r4 r r2 r r3 r r1 r ac6 c ac5 r ac7 c ac4 r ac1 c ac3 r ac3 r ac2 r ac5 r ac4 c ac2 c az c i r b1 r b2 r b3 r i6 r i5 r i4 r i3 r i2 r i1 4a, 10a com dca, aca open fuse 110v,0.3a dcv acv w cont ptc 1k v w cont c fi r vi r ovx key scan circuit c l1 c l2 c l3 c sr c b1 c b2 c r c ac1 c ac2 c ac3 c ac4 c ac5 c az c 1 c fi c i r r1 r r2 r r3 r r4 r ac1 r ac2 r ac3 r ac4 r ac5 r ac6 r ac7 r b1 r b2 r b3 r vi r ovx r ovsg r 1 r 2 r 3 r 4 r 5 r 6 r bz1 r bz2 r i1 r i2 r i3 r i4 r i5 r i6 ptc parts 0.047 f 0.047 f 0.047 f 0.33 f 2.2 f 2.2 f 0.22 f 0.1 f 2.2 f 2.2 f 0.22 f 0.1 f 0.1 f 0.1 f 0.01 f 0.1 f 82 k w 22 k w 120 k w 75~412 k w 22 m w 21 k w 500 k w 22 k w 22 k w 330 k w 330 k w 390 k w -329 k w 39 k w 10 m w 1 m w 680 k w 100 w 1 k w 10 k w 101 k w 1.11 m w 10 m w 100 w 100 w 0.01 w 0.09 w 0.9 w 9 w 90 w 900 w 1 k w value sr 1.0 % 1.0 % 1.0 % 1.0 % 1.0 % 1.0 % 1.0 % 1.0 % 1.0 % 0.1 % 0.1 % 0.1 % 0.1 % 0.1 % 0.1 % 0.1 % 0.1 % 0.1 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % + + 218.5 mv 1.00 v c ac1 dcv acv cont w w cont r 6 r 5 r 4 r 3 r 2 r 1 r ovsg r bz2 r bz1 n basic external connection diagram note: the above table is simply an example, and is not guaranteed to work.


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